A conventional wiring board includes a multilayer wiring formed according to a buildup technique (see Japanese Laid-Open Patent Publication Nos. 2003-023252 and 2003-023253, for example). The buildup technique forms a multilayer wiring by repeatedly forming insulating layers, through holes, electric wires by use of electrolytic plating, for example.
An electronic component, such as a semiconductor chip, is mounted on a wiring layer of a wiring board. The wiring layer of a wiring board has been miniaturized with the enhancement in performance of the electronic component.